Development Research and technical architecture of Dual-Interface Card

Source: Internet
Author: User

1. Introduction
1.1. Introduction to non-contact cards and contact cards
 
Nowadays, contact IC cards (hereinafter referred to as contact cards) are widely used in people's daily life. In the popularization of contact cards, many drawbacks are gradually discovered: stuck on the readerWear caused by frequent plugging causes poor contact, CausingData Transmission ErrorIn addition, the wear between the card and the reader greatly shortens the service life of the card and the reader. In addition, the contact cardLow Communication Rate, Coupled with the delay in card insertion and removal, each transaction takes a long wait.
To solve these problems, non-contact IC cards (hereinafter referred to as non-contact cards) emerged. The advantage of a non-contact card is obvious: it communicates with read and write devices through radio waves, there are no exposed contacts, there is no mechanical contact with the reader, high reliability and high service life; itsCommunication rate higher than contact cardAnd can communicate with the read/write device from any direction within a certain distance, making the operation more convenient and fast. As a result, non-contact cards have replaced contact cards in many cases, and account for an increasing share of the card market. Non-contact cards also have defects:When the card is bent too much, the card is prone to failure due to the breakage of the coil solder joints.In some cases, communication is prone to environmental interference and fails. The encryption method is simple, and the security is lower than that of the contact card.
In general, contact cards and non-contact cards have their own advantages and disadvantages due to different use environments, so they have been widely used in practical applications. Applications with high security requirements and low operation speed, such as bank cards, usually use contact cards. Applications with low security requirements and high operation speed, such as public transportation, generally, non-contact cards are used.
The advantages and disadvantages of non-contact IC cards and contact IC cards are shown in table 1.

1.2. Development of Non-contact card applications  
With the development of technology and application, non-contact cards are widely used and their functions become more and more powerful. In applications, a dual-interface IC card is used in combination with a non-contact IC card. The dual-interface IC card has both the durability and convenience of the non-contact card and the security.
More and more applications require not only the interfaces of non-contact cards, but also the application development of traditional non-contact cards. In the past, commands for non-contact cards were relatively simple with fewer functions. To complete a complex operation, for example, to create a file, you must have a good understanding of the data structure of the non-contact card and write many instructions. In particular, many of the data stored in the non-contact card is sensitive, such as the amount. When reading and writing the data, if the operation is interrupted accidentally, correct data recovery is a headache and requires high software skills. All these greatly impede the application development of non-contact cards. Therefore, it is a good solution to integrate non-contact cards into the CPU and provide a simple and powerful application software development interface through cos software.

2. research objectives and content
The purpose of this article is to design a CPU card chip with a serial contact interface and a non-contact interface. We call this design a dual-interface card.
The idea of this article is how to design the chip architecture reasonably, so that the CPU, operating system software and external interface are irrelevant, and the original design resources should be used as much as possible to complete the chip design.
2.1 chip architecture
The chip consists of the CPU system, interface, and memory. The interface is used to transmit commands and data with the outside world. This chip provides ISO/IEC 14443-a Non-Contact Interface and serial communication-based contact interface. The CPU system is a high-speed microprocessor, peripherals, Ram, Rom, and EEPROM compatible with 8051 commands.
The chip architecture 1 is shown in.

The basic idea of this architecture is to make the interface between the CPU system and the interface of the smart card relatively independent. The interface forms the underlying layer of the application, and the application processing of the operating system software does not need to care about the specific implementation of the interface. This means that from the perspective of application software development, the information is irrelevant to the specific interface that the application is using. Interfaces can change with the development of applications. They can be a combination of contact and non-contact, or even a combination of Bluetooth, WLAN, IRD, parallel interfaces, and other types of interfaces.
This interface and CPU system can be freely combined based on the unified access specification, providing great benefits to users, Chip designers and system software designers: when introducing new applications or developing new systems, you can select existing mature basic modules to speed up development and reduce development costs and risks.
2.2 interface with CPU system
To achieve the independence between interface interfaces and software, a simple standard interface must be established between the CPU system and various interface interfaces. In this design, the special function register (SFR) method with 8051 series Processors is used as the standard for accessing different interface interfaces of CPU.
The receiving and demodulation and transmitting Modulation circuits on the non-contact interface are existing modules in the design of the original non-contact card. SFr addressing Some control registers and logic circuits can be added to easily set up interfaces supporting special function registers (SFR) in Non-Contact Interfaces.
The contact interface is an interface that supports Special Function registers (SFR ). Serial (UART) Module , Unlike the standard UART, the sending and receiving of this module is One open and two-way data line This means that only Half Duplex .
After data communication with the outside world is completed, use the interrupt request signal to wake up the CPU in sleep mode. In this design, a 8051 External Interrupt int1 is used for the non-contact interface, and an internal serial interrupt is used for the contact interface. .
2.3 Power Supply generation

A difficult problem with dual interface cards is how to provide a CPU system Reliable system clock and power supply . Because both interfaces generate clock and power supply, the system must be able to switch between them correctly without conflict.
This design presents a simple and reliable method to generate power supply and clock. In particular, the method described in this article also supports two interfaces working simultaneously.
Indicates the power switching method of the two interfaces. Capacitor C1 is the energy storage capacitor of the chip. C1 can store the charge during non-contact power supply and operation, and C1 can stabilize the VDD voltage when the external power supply is used in contact operation. To prevent possible backflow of current, diode d1 is used to ensure one-way flow of current. Of course, the existence of D1 will lead to a voltage difference between VDD and external ext_vdd. The solution is to use a special low-threshold MOS tube to replace a common diode. It should be pointed out that the voltage generation circuit from the non-contact interface is a bridge-type rectifying structure, and the current will not flow in reverse direction, so no need to string a diode like D1.
The DC-DC module is designed to provide a low and stable operating voltage for the system under different power supply voltages. This helps reduce the chip power consumption and adapt to the power supply voltage requirements in different application scenarios.
2.4 reset signal generation

Is the generation of CPU reset signals. The power-on and power-off detection module monitors the voltage of VDD and generates a power-on and power-off reset signal when the power-on process or the working voltage is too low. The wdt module is a watch dog timer circuit ), after the software does not perform operations on the wdt module for a long time, the wdt generates a timeout reset signal to reset the CPU. The CPU also reads and writes the wdt module through the SFR interface.
In particular, although the contact interface has a reset signal input foot, it does not generate a CPU reset. When the reset signal of the contact interface is valid, the contact interface sets a reset flag and causes an interruption. The CPU determines how to process the reset request of the external interface.
2.5 system clock generation

The system clock has two sources: Non-Contact Interface and contact interface. In order to enable the system to work under a clock from any interface, and to correctly communicate with the two interfaces at the same time, this requires the system to switch the system clock at any time according to the application. In addition, in order to reduce the power consumption of the system as much as possible, you also need to shut down the system clock when the CPU does not need to work, and recover the clock after the interruption is generated.
As shown in, the chip uses a clock management module to switch the clock clk1 (3.39 MHz) and clk2 (typically 3.58 MHz) to the system clock CLK, the CPU can also shut down the CLK to save power consumption. When int1 and int2 are interrupted, the clock management module recovers the system clock.
From the system architecture, we can see that the CPU and clock on the two interfaces do not need to be synchronized during normal operation, because the interface modules with independent functions are responsible for communication, the communication clock can be generated on the interface alone. The CPU only accesses these two interface modules through the special register (SFR) interface. Therefore, when the two interfaces work simultaneously, the CPU system clock can be either clk1 or clk2. When both interrupts are valid, the system clock will be restored from the clock on the Interface on which the interruption was first applied, and the interface interruption will be handled first.
Is the circuit diagram of the clock management module. Stop_clk from the CPU will shut down the CLK, And the interruption request int1, int2 from the interface or the interruption int3 from the timer will clear the Shutdown signal, the reason is to recover the clock selection module to decide to recover the clock.

In the figure, clk_timer is the timer, and the output of clk_timer is prior to the door to ensure that the timer still has a clock to count after the system clock is disabled.

3. Conclusion
This paper studies the application of non-contact IC cards and contact IC cards, and proposes a design scheme for a non-contact card interface supporting ISO/IEC 14443-a standard and a dual-interface CPU card platform supporting serial interfaces. The dual-interface CPU card designed in this solution can provide more powerful application development interfaces on the basis of compatibility with existing non-contact and contact CPU cards, and can serve as a carrier for mobile device short-distance communication.
This article proposes a new dual-Interface Card architecture. The advantage of this architecture is that the CPU control system and the specific interface types are mutually independent, making cos software development easier; we recommend that you use the IP Reuse Technology and build blocks to shorten the design cycle of the chip.

References
[1] Ulrich Kaiser, Wolfgang steinhagen. A low-power trancoder der IC for high-performance identification systems. IEEE journal of solid-state circuit, vol30, No. 3. March 1995
[2] Wang Yu. Development of IC Card storage chip. Master's thesis in National Key Laboratory of integrated circuits and systems, Fudan University. 1998
[3] Gary Yeap. Pratical Low Power digital mass design. Kluwer Academic publisher.1998,
[4] Yu hongjun, Zhao dongyan. Intelligent (IC) Card Technology book. Electronic Industry Press. October 1996
[5] Duane H. oto, Vinod K. dham, Keith H. gudger et al. high-Voltage Regulation and process considerations for high-density 5v-only EEPROMS, IEEE. j. solid-state circuits, vol. SC-18, no. 5, pp.532-538, Oct. 1983

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