Embedded System Design Based on microblze

Reference: http://xilinx.eetrend.com/d6-xilinx/article/2013-03/3863.html

Abstract: In today's era, embedded systems are everywhere and are closely related to people's daily lives. The embedded system is based on the microprocessor and computer technology. Its main feature is strong real-time performance. According to statistics, at present, more than 95% of the world's total microprocessors are produced every year for embedded system applications, the architecture, design process, and related development tools are described in detail. A simple example is provided to describe the development process of the embedded system with the microblze processor as the kernel.

1. microblze processor Structure
The microblze processor is a 32-bit embedded processor kernel developed and applied by Xilinx for embedded processors. It is a soft-core structure that is simple but flexible, any configuration can be performed on the target device. He uses the RISC Instruction Set and Harvard architecture. The processor has the following features:
(1) 32 32-bit General registers and 2 dedicated registers.
(2) The 32-bit command system supports three operands and two addressing modes.
(3) separated 32-bit commands and data bus, in line with ibm opb Bus Specifications.
(4) access the on-chip block storage (Bram) directly through the local memory bus (LMB ).
(5) It has a high-speed command and data cache, and a three-level pipeline structure.
(6) has a hardware debugging module (MDM ).
(7) provides eight input/output fast link interfaces (FSL ).

Note:
The data interface bus of the peripheral device inside the dopb device, used for data exchange between the processor and the device in the chip.
A local Block Storage bus that enables data exchange. This bus provides a dedicated high-speed data exchange channel between the processor kernel and block storage (Bram.

 

Iopb is used to implement the bus interface of external program memory. When the program is large, a large external storage capacity is required. The bus provides a channel for reading commands.

Ilmb is the local memory bus used to obtain commands. This bus is connected to the block memory (Bram) in the device to achieve high-speed command reading.

Mfsl0.7 main device data interface, provides point-to-point communication channel.

Sfsl0.7 provides point-to-point communication channels from the device data interface.

2 EDK Development Process
EDK (Embedded Development Kit) is a development kit developed by Xilinx for 32-bit embedded processors in FPGA. The EDK toolkit integrates hardware platform generator, software platform generator, simulation model generator, software compiler, software debugging, and other tools, using its integrated development environment XPS (Xilinx platform studio) the entire process of embedded system development can be completed conveniently and quickly. EDK uses IP core to provide resources such as LMB, OPB bus interface, external storage controller, SDRAM Controller, UART interrupt controller, timer, and other peripheral device interfaces, designers can easily build a complete embedded processor system, as shown in figure 2.

 

A complete embedded processor system design usually includes three parts: hardware system construction, memory ing and software development, and application development.

In the integrated development environment of XPS, the construction of the embedded processor hardware system is defined by the microprocessor hardware specification (MHS) file and the microprocessor peripheral device description (MPD) file; the software system structure is defined by the Microprocessor Software Specification (MSS) file. Its development process is shown in step 3.

 

The MHS file is used to describe the hardware system structure and define the processor type, bus interface, peripheral interface, interrupt processing, and address space. This file can be created in any text editor, which is a schematic input of regionalization. The MPD file contains all valid input/output interfaces and hardware parameters of the peripheral device. MSS files are mainly used to define software libraries, drivers, and file systems.

Note: data2bram is used to file software code (3. elf), FPGA bit stream files (3. bit) and block storage (Bram) initialize data files (3. BMM) into a new FPGA bit stream file (3. bit) and memory data files (3. mem ). The compilation of applications will be detailed in the following example.

3. A simple instance
This example describes the development process of an Embedded Processor System Based on the e-element-based digital sword series Firefox 3 evaluation board, focusing on application programming. For other evaluation boards, you only need to slightly modify the user constraint file (3. UCF. For simplicity, compared to a complete system shown in figure 2, the system described in this example only hangs the MDM (hardware debugging module) and gpio (general input/output device) on the OPB bus) two peripheral devices, gpio corresponds to eight L Ed output on the evaluation board. After the FPGA is downloaded, the eight L Ed will flash continuously. The detailed description is as follows:

Step 1: build the hardware system. In the integrated development environment of XPS, a simple hardware system with the mi-croblze processor as the core is automatically created using the BSP (Base System Builder) wizard, set the CPU clock frequency to 50 MHz and bus clock frequency to 50 MHz. Set the on-chip read/write debugging module as the debugging interface and add only MDM and gpio to the Processor IP address. Follow the Wizard to build the hardware system.

Step 2: After the hardware system is established, the XPS integrated tool is used to generate the network table and configure the software. Memory Address ing (automatically generated by the system by default, the allocated address varies with the system), as shown in table 1. The identifier and Address Allocation of the driver configuration and memory ing are included in the xparameter S. H file. For details about the operation in the preceding two steps, see the EDK documentation.

 

Step 3: Develop the application. There are two methods for compiling applications in C language. The first method is to use the application interface functions (APIS) provided by EDK. The interface functions are complex and difficult to understand; the second method is to access the hardware in a common way, that is, simply assigning values to addresses. In this example, the latter is used to assign an address value. First, you must understand the Register address ing of gpio. See table 2.

 

The code and description are as follows:
First, set a pointer variable to assign the address allocated to the gpio to the pointer variable, that is, to point the pointer to the gpio base address, that is, the gpio data register ), then, write zero to the three-state control register of gpio (the address is added with offset 4 to the base address, that is, add 4 to the pointer variable) and set gpio as output, next we can send the number to the gpio data register to control the status of 8 L Ed.
# Include "xbasic_types. H"
# Include "xparameters. H"
# Include "xutil. H"
# Include "xgpio_l. H"
# Define L Ed Dela y 2000000
Void main ()
{
Xuint32 DATA = 0xaa;
Int delay;
Int COUNT = 0;
Xuint32 3 ledpt R;
Ledpt r = (INT 3) 0x80002200; // pointer to gpio
* (Ledpt R + 4) = 0x00000000;
// Write zero to the gpio_tri register and initialize the gpio as the output
While (1)
{Count ++;
If (count % 2 = 0)
{
* Ledpt r = 0x55;
// Sends data to the gpio_data register, driving the L Ed
}
Else
{
* Ledpt r = 0xaa;
// Sends data to the gpio_data register, driving the L Ed
}
For (delay = 0; delay <L ed_dela y; delay ++ );
// Delay to see if l ed is blinking
If (count % 2 = 0)
{
* Ledpt r = 0x0f;
// Sends data to the gpio_data register, driving the L Ed
}
Else
{
* Ledpt r = 0xf0;
// Sends data to the gpio_data register, driving the L Ed
}
For (delay = 0; delay <L ed_dela y; delay ++ );
// Delay to see if l ed is blinking
}
}

Embedded System Design Based on microblze