Vivado Incremental Compilation

The incremental design in Vivado will reuse existing layout and routing data to reduce uptime and produce predictable results. When the design has more than 95% similarity, the running time of the incremental layout will be twice times shorter than the average layout route. If the similarity is less than 80%, the use of incremental layout is only a small advantage or basically no advantage.

The incremental layout of Vivado is recommended when the design is in the late stages, with a small change in run time, and with a high similarity in the design grid table read before the start of the backend implementation. The premise of running the incremental process is that there is a reference design checkpoint for the layout and cabling (the design Checkpoint, DCP) file, which is used as a reference for the new layout and cabling. During the operation, Vivado is read in the Tcl script with Read_checkpoint–incremental *.DCP. The reference file can be a layout or a routed DCP file. In addition, you can run the Report_incremental_reuse command to check and report the similarity between the reference design check file and the current design file.

Using Incremental Compile in Non-project Mode

To specify a design checkpoint file (DCP) to use as the reference design, and to run incremental place in Non-project Mode :

1. Load the current design.

2. Run opt_design.

3. Run read_checkpoint-incremental <dcp_file>.

4. Run place_design.

5. Run phys_opt_design (optional). Run phys_opt_design Ifit was used in the reference

Design.

6. Run Route_design.

Tcl script:

Link_design; # to-load the current design

Opt_design

Read_checkpoint-incremental <dcp_file>

Place_design

Phys_opt_design; #if used in reference design

Route_design

Note: You can use the incremental compilation method to update the initialization data in the Bram to reduce the combined time by half.

Reference documents:

[1] He Bin. Xilinx FPGA authoritative Design Guide--vivado2014 integrated development environment. Electronic industry Press. 2015,2.

[2] Xilinx. Ug904:incremental Compile. 2013,10,2.

Vivado Incremental Compilation