PCB Design and signal integrity

Prior to designing the board, I had only heard the relevant concepts, but did not really study si related knowledge. Organize some of the previously seen information as follows:

(1) Signal Integrity analysis

Factors related to SI : reflection, crosstalk, radiation. the reflection is caused by impedance mismatch on the transmission path; Crosstalk is caused by line spacing, and radiation is related to the high-speed device itself and the PCB design.

Transmission line Judgment

Transmission lines can be judged by referring to the previous blog

The signal frequency and transmission path length need to be considered for high-speed and low-speed differentiation by using the formula of high-speed signal.

Judgment Step: 1) Obtain the effective frequency of the signal fknee and the length of the line L;

2) using Fknee to calculate the effective wavelength λknee of the signal, i.e. Λknee = C/fknee;

3) Determine the relationship between L and 1/6 Xλknee, if L > 1/6 Xλknee, then the signal is high-speed signal, the reverse is low-speed signal;

where Λknee = C/fknee, where C is slightly lower than the speed of light, Fknee = 0.5/tr (10% ~ 90%), but also note that if the signal for the hundred-gigabit frequency, if there is no ready-made board, you can estimate the effective frequency Fknee, fknee about 7 times times F Clock (the period of the signal).

If L > 1/6 Xλknee, it is considered as transmission line, transmission line must consider the transmission process may be due to impedance mismatch caused by signal reflection problem.

Reflection formula

The reflection of the signal ρ= (Z2-Z1)/(Z2 +z1);

Where Z2 is the line impedance after the reflection point, and the Z1 is the line impedance before reflection;

The possible presence value of ρ is ±1,0, when it is fully absorbed for 0 o'clock, and when it is ±1, the reflection occurs. The reflection of the signal is caused by the mismatch of the beginning, transmission path and terminal impedance.

Reduced Reflection method

In order to minimize the reflection of the signal, it is necessary to Z2 and Z1 as close as possible. There are several methods for impedance matching: The sending End series matching, the receiver side parallel matching, the receiving end voltage matching, the receiver terminal block parallel matching, the receiver side diode parallel matching.

3) Receive end-of-voltage matching

4) receiver-side resistance-capacitance parallel matching

Advantages: low power consumption;

Disadvantage: There is a high and low level mismatch of the receiver, because of the presence of capacitors, the edge of the signal will change slowly.

(2) Signal circuit

The signal loop consists of two paths, one is the driving path, the other is the circuit path, the signal level measured at the transmitting end, the transmission path, and the receiving end is essentially the voltage value of the signal in the corresponding position on the drive path and return path, which is very important for the two paths.

To provide a complete reflow path, the following points need to be noted:

1. When the signal is changed, it is best not to change the reference layer, if the signal is changed from the signal layer 1 to the signal Layer 2, the reference layer is the bottom 1, in this case, the return path does not need to change the layer, that is, the signal to change the layer has no effect on its back path.

2. When the signal is changed, it is best not to change the network properties of the reference layer. That is, the signal 1 starts the reference layer is the Power Layer 1/stratum 1, after the change layer, the signal 1 is the reference layer of the Power Layer 2/stratum 2, the reference layer of the network properties are not changed, are GND or power properties, can be used nearby GND or power supply through the hole to achieve reverse path. Here in the high-speed situation, the capacity and inductance of the hole can not be neglected, in this case, as far as possible to reduce the hole, reduce the hole itself caused by the impact of the impedance change, reduce the signal return path.

3. When the signal is changed, it is advisable to add a cross-hole with the reference layer in the vicinity of the signal vias.

4. If the network properties of the two-layer reference layer are different before and after the change, it is required that the two reference layers are close to each other to reduce the pressure drop on the inter-layer impedance and return path.

5. When the signal of the change layer is more dense, the nearby ground or the power supply through the hole should maintain a certain distance, the change layer signal is many, need to hit several pairs of ground or the power supply through the hole.

(3) Crosstalk

The solution to crosstalk is high-speed signals, clock signals, other data signals, etc., spaced to meet the 3W principle.

PCB Design and signal integrity