Makefile Detailed condition judgment 20Use conditions to judge
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Using conditional judgment, you can allow make to choose a different branch of execution based on the different circumstances of the runtime. A conditional expression can be a value of a comparison variable, or a value that compares variables and constants.
1, example
The following example determines whether the $ (CC) variable is "gcc" and, if so, uses the GNU function to compile the target.
LIBS_FOR_GCC =-lgnu
Normal_libs =
Foo: $ (objects)
Ifeq ($ (CC), GCC)
$ (CC)-o foo $ (objects) $ (LIBS_FOR_GCC)
Else
$ (CC)-o foo $ (objects) $ (normal_libs)
endif
Visible, in this rule of the example above, target "foo" can compile the program by selecting a different function library based on the variable "$ (CC)" value.
We can see three keywords in the example above: ifeq, Else, and endif. The meaning of the ifeq represents the beginning of a conditional statement and specifies a conditional expression that contains two arguments, separated by commas, and the expression is enclosed in parentheses. else indicates a condition where the conditional expression is false. ENDIF represents the end of a conditional statement, and any conditional expression should end with a endif.
When our variable $ (CC) value is "gcc", the rule for the target Foo is:
Foo: $ (objects)
$ (CC)-o foo $ (objects) $ (LIBS_FOR_GCC)
And when our variable $ (cc) value is not "GCC" (such as "CC"), the rule for Target foo is:
Foo: $ (objects)
$ (CC)-o foo $ (objects) $ (normal_libs)
Of course, we can also write the above example more concise:
LIBS_FOR_GCC =-lgnu
Normal_libs =
Ifeq ($ (CC), GCC)
libs=$ (LIBS_FOR_GCC)
Else
libs=$ (Normal_libs)
endif
Foo: $ (objects)
$ (CC)-o foo $ (objects) $ (LIBS)
2, the grammar
The syntax for a conditional expression is:
<conditional-directive>;
<text-if-true>;
endif
And:
<conditional-directive>;
<text-if-true>;
Else
<text-if-false>;
endif
where <conditional-directive>; denotes conditional keywords, such as "ifeq". This keyword has four.
The first one is the "ifeq" we've seen before.
Ifeq (<arg1>;, <arg2>;)
Ifeq ' <arg1>; ' ' <arg2>; '
Ifeq "<arg1>;" "<arg2>;"
Ifeq "<arg1>;" ' <arg2>; '
Ifeq ' <arg1>; ' "<arg2>;"
Compares the values of the parameters "Arg1" and "arg2" to be the same. Of course, we can also use the Make function in the parameters. Such as:
Ifeq ($ (Strip $ (foo)),)
<text-if-empty>;
endif
In this example, the "strip" function is used, and if the return value of the function is null (EMPTY), then <text-if-empty>; takes effect.
The second condition keyword is "ifneq". The syntax is:
Ifneq (<arg1>;, <arg2>;)
Ifneq ' <arg1>; ' ' <arg2>; '
Ifneq "<arg1>;" "<arg2>;"
Ifneq "<arg1>;" ' <arg2>; '
Ifneq ' <arg1>; ' "<arg2>;"
The values for the comparison parameter "Arg1" and "arg2" are the same and, if they are different, true. Similar to "ifeq".
The third condition keyword is "ifdef". The syntax is:
Ifdef <variable-name>;
If the value of the variable <variable-name>; is not empty, then the expression is true. Otherwise, the expression is false. Of course,<variable-name>; can also be the return value of a function. Note that ifdef simply tests whether a variable has a value and does not extend the variable to its current position. Let's take a look at two examples:
Example one:
Bar =
Foo = $ (bar)
ifdef foo
Frobozz = yes
Else
Frobozz = No
endif
Example two:
Foo =
ifdef foo
Frobozz = yes
Else
Frobozz = No
endif
In the first example, the "$ (frobozz)" value is "yes" and the second is "no".
The fourth condition keyword is "ifndef". Its syntax is:
Ifndef <variable-name>;
This I will not say much, and "ifdef" is the opposite meaning.
In the <conditional-directive>; line, extra spaces are allowed, but you cannot start with the [Tab] key (otherwise it is considered a command). The annotation character "#" is also safe. "Else" and "endif" are the same, as long as they are not started with the [Tab] key.
Of particular note is that make is to evaluate the value of the conditional expression while reading the Makefile, and select the statement based on the value of the conditional expression, so you should not put automation variables (such as "$@", etc.) into the conditional expression, because the automation variable is at run time.
Also, to avoid confusion, make does not allow the entire conditional statement to be divided into two parts in a different file.
