UBOOT porting (3)

Bytes ----------------------------------------------------------------------------------------------------
--------------------------------- Board/myboard/common/flash. c -----------------------------------
Bytes ----------------------------------------------------------------------------------------------------
Find this function: write_buff

There is a total of six words in it, right? Changed all: # ifdef CONFIG_B2

Change CONFIG_B2 to the name in the TT. h file above. My name is CONFIG_TT.

One question about FLASH:
I have been wondering whether 29LV160 and 39LV160 are compatible with U BOOT.
After reading this program, it seems that u boot can be automatically detected.

Bytes ----------------------------------------------------------------------------------------------------
--------------------------------- Board/T2T/TT/memsetup. S -----------------------------------
--------------------------------- Also called board/T2T/TT/lowlevel_init.S -----------------------------------
Bytes ----------------------------------------------------------------------------------------------------
Modify as follows:

* Bank 0 parameter */
. Equ b0_tacs, 0x3/* 0clk */
. Equ b0_tcos, 0x3/* 0clk */
. Equ b0_tacc, 0x7/* 14clk */
. Equ b0_tcoh, 0x3/* 0clk */
. Equ b0_tah, 0x3/* 0clk */
. Equ b0_tacp, 0x1/* 0clk */
. Equ b0_pmc, 0x0/* normal (1 data )*/
/* Bank 1 parameter */
. Equ bw.tacs, 0x0/* 4clk */
. Equ bw.tcos, 0x1/* 4clk */
. Equ bw.tacc, 0x2/* 14 clkv */
. Equ bw.tcoh, 0x1/* 4clk */
. Equ B1_Tah, 0x0/* 4clk */
. Equ B1_Tacp, 0x0/* 6clk */
. Equ bw.pmc, 0x0/* normal (1 data )*/

/* Bank 2 parameter -*/
. Equ B2_Tacs, 0x0/* 4clk */
. Equ B2_Tcos, 0x2/* 4clk */
. Equ B2_Tacc, 0x4/* 14clk */
. Equ B2_Tcoh, 0x2/* 4clk */
. Equ B2_Tah, 0x3/* 4clk */
. Equ B2_Tacp, 0x3/* 6clk */
. Equ B2_PMC, 0x0/* normal (1 data )*/

/* Bank 3 parameter */
. Equ B3_Tacs, 0x3/* 4clk */
. Equ B3_Tcos, 0x3/* 4clk */
. Equ B3_Tacc, 0x7/* 14clk */
. Equ b3_tcoh, 0x3/* 4clk */
. Equ b3_tah, 0x3/* 4clk */
. Equ b3_tacp, 0x3/* 6clk */
. Equ b3_pmc, 0x0/* normal (1 data )*/

/* Bank 4 parameter */
. Equ b4_tacs, 0x3/* 4clk */
. Equ b4_tcos, 0x3/* 4clk */
. Equ b4_tacc, 0x7/* 14clk */
. Equ b4_tcoh, 0x3/* 4clk */
. Equ B4_Tah, 0x3/* 4clk */
. Equ B4_Tacp, 0x3/* 6clk */
. Equ B4_PMC, 0x0/* normal (1 data )*/

/* Bank 5 parameter */
. Equ B5_Tacs, 0x0/* 4clk */
. Equ B5_Tcos, 0x1/* 4clk */
. Equ B5_Tacc, 0x4/* 14clk */
. Equ B5_Tcoh, 0x1/* 4clk */
. Equ B5_Tah, 0x0/* 4clk */
. Equ b5_tacp, 0x0/* 6clk */
. Equ b5_pmc, 0x0/* normal (1 data )*/

/* Bank 6 (if srom) parameter */
. Equ b6_tacs, 0x3/* 4clk */
. Equ b6_tcos, 0x3/* 4clk */
. Equ b6_tacc, 0x7/* 14clk */
. Equ b6_tcoh, 0x3/* 4clk */
. Equ b6_tah, 0x3/* 4clk */
. Equ b6_tacp, 0x3/* 6clk */
. Equ B6_PMC, 0x0/* normal (1 data )*/

/* Bank 7 (if SROM) parameter */
. Equ B7_Tacs, 0x3/* 4clk */
. Equ B7_Tcos, 0x3/* 4clk */
. Equ B7_Tacc, 0x7/* 14clk */
. Equ B7_Tcoh, 0x3/* 4clk */
. Equ B7_Tah, 0x3/* 4clk */
. Equ B7_Tacp, 0x3/* 6clk */
. Equ B7_PMC, 0x0/* normal (1 data )*/

/* Bank 6 parameter */
. Equ b6_mt, 0x3/* SDRAM */
. Equ b6_trcd, 0x1/* 2clk */
. Equ b6_scan, 0x0/* 8bit */

. Equ b7_mt, 0x3/* SDRAM */
. Equ b7_trcd, 0x1/* 2clk */
. Equ b7_scan, 0x0/* 8bit */

/* Refresh parameter */
. Equ refen, 0x1/* refresh enable */
. Equ trefmd, 0x0/* CBR (CAS before RAS)/auto ****/
. Equ Trp, 0x0/* 2clk */
. Equ Trc, 0x3/* 0x1 = 5clk 0x3 = 11clk */
. Equ Tchr, 0x0/* 0x2 = 3clk 0x0 = 0 clks */
. Equ REFCNT, 1550

MEMORY_CONFIG:
. Long 0x01000102/* Bank0 = OM [1:0], Bank1-2 4-7 16bit, BANK3 8BIT, Bank2 = Nowait, UB/LB */
. Word (B0_Tacs <13) + (B0_Tcos <11) + (B0_Tacc <8) + (B0_Tcoh <6) + (B0_Tah <4) + (B0_Tacp <2) + (B0_PMC)/* GCS0 */
. Word (B1_Tacs <13) + (B1_Tcos <11) + (B1_Tacc <8) + (B1_Tcoh <6) + (B1_Tah <4) + (bw.tacp <2) + (bw.pmc)/* GCS1 */
. Word (B2_Tacs <13) + (B2_Tcos <11) + (B2_Tacc <8) + (B2_Tcoh <6) + (B2_Tah <4) + (B2_Tacp <2) + (B2_PMC)/* GCS2 */
. Word (B3_Tacs <13) + (B3_Tcos <11) + (B3_Tacc <8) + (B3_Tcoh <6) + (B3_Tah <4) + (B3_Tacp <2) + (B3_PMC)/* GCS3 */
. Word (B4_Tacs <13) + (B4_Tcos <11) + (B4_Tacc <8) + (B4_Tcoh <6) + (B4_Tah <4) + (B4_Tacp <2) + (B4_PMC)/* GCS4 */
. Word (B5_Tacs <13) + (B5_Tcos <11) + (B5_Tacc <8) + (B5_Tcoh <6) + (B5_Tah <4) + (B5_Tacp <2) + (B5_PMC)/* GCS5 */
. Word (B6_MT <15) + (B6_Trcd <2) + (B6_SCAN)/* GCS6 */
. Word (B7_MT <15) + (B7_Trcd <2) + (B7_SCAN)/* GCS7 */
. Word (REFEN <23) + (TREFMD <22) + (Trp <20) + (Trc <18) + (Tchr <16) + REFCNT) /* refresh rfen = 1, TREFMD = 0, trp = 3clk, trc = 5clk, tchr = 3clk, count = 1019 */
. Word 0x10/* SCLK power down mode, BANKSIZE 16 M/16 M */
. Word 0x20/* MRSR6 CL = 2clk */
. Word 0x20/* MRSR7 */
It is important to note that the content in MEMORY_CONFIG is set. long 0x01000102/* Bank0 = OM [1:0], Bank1-2 4-7 16bit, BANK3 8BIT, Bank2 = Nowait, UB/LB */set the bit width of each BANK, note. Because 8019 has 8 bits and 16 bits, the network fails to be configured incorrectly.
It is actually a few words
After someone reads it from the address, it's okay.
"
MEMORY_CONFIG:
. Long 0x11010102
. Long 0x600
. Long 0x7ffc
. Long 0x7ffc
. Long 0x7ffc
. Long 0x7ffc
. Long 0x2610
. Long 0x18000
. Long 0x18000
. Long 0x960459
. Long 0x10
. Long 0x20
. Long 0x20
Because you are not familiar with armsys hardware, there is no way to read the armsys bootloader program, but there are differences in each version. Therefore, the value in 0x1c80000 after bootlaoder is started is used for axd debugging.

"
Note: This is post-added because I and my friends found that there were very few people analyzing this part on the Internet, probably because the theory is relatively simple, the operation is troublesome.
Listen to cainiao's methods.

First, there is a small difference between U boot1.1.1 and 1.1.4, that is, the difference in file name 1.1.1 is called memsetup. s, 1.1.4 is called lowlevel_init.s. If you use 1.1.1 to compile the program directly, you can also change the function name in the file while modifying the file name! Is the function name in the final part of this file. Otherwise, the system will prompt that lowlevel_init cannot be found in start. S. Remember

In addition, what exactly does this important part represent and how to change it.
This file is actually divided into three parts. These three parts actually re-combine the several assembly files initialized by 44b0, Which is what ads said in the ram debugging documentation, when 44b0 is used as a single-chip microcomputer, write the Assembly file before the C language, which generally includes 44binit. s memcfg. s 44blib_a.s option. s. Among them, 44binit. s memcfg. S contains the memory initialization parameters. modify these two files.

Let's talk about the three parts.
The memory is set at the beginning. In the Data Manual (English) 4-14 pages, the meaning is not much said. Let's talk about how to change it. Of course you have to change it based on your memory (a nonsense). But there is a simple method. As mentioned above, let's look at the memcfg. s file.

Then there are some shift-only operations to set each bank. In fact, it is to set some predefined words and then use these words to set registers elsewhere. Think of it as a macro or a struct (not accurate, it helps to understand ). Why is this setup? Check the Data Manual (English) on pages 4-13.
How can this part be improved quickly? Where can I find it? 44binit. S is exactly the same.

The last part is the unique execution part of this file.
Basically, you don't need to change it (except sometimes the function name :))
Do you still understand 0x01c80000? Go to the 4-3 pages of the Data Manual. There is an assembly example. Why is this 32-bit register set.

Don't look at what I installed here, but I will deal with it. Don't be honest with me. I am still studying it :)

Note: By the way, let's talk about a small problem. Some friends asked "Why does the address line on the schematic diagram Start from A1, rather than A0" and read the data manual (in English) on pages 4-4, because it is a 16-bit location ~~~
Note: My 8019 is connected to bank3 and is 8bit, so do the settings in the first item in memory_config.

Bytes ----------------------------------------------------------------------------------------------------
--------------------------------- Board/t2t/TT/config. mk -----------------------------------
Bytes ----------------------------------------------------------------------------------------------------
Modify the final TEXT_BASE to load the UBOOT to the RAM address. Here, 0XC700000 is added. Of course, 0XC300000 is added. However, if 0XC300000 is added, it seems that the LINUX download will crash, due to insufficient address space