System Design survey: ASIC focus

Absrtact: When the System Designer explores the IC business model with new application features, the main concern is the price.

Strategic needs statement:
As the market conditions will improve over the next two years, the importance of the road map for advanced technology development will be increased. Encapsulated internal system (SIP) and embedded DRAM ASIC will become the mainstream technology in the next 2-5 years.

Research objectives
To further the electronic system closer to a single chip solution, designers have made more demands on ASIC and programmable logic devices (PLD) providers. Higher performance, larger memory and kernel libraries, all of which are developing at a high point, and engineers are demanding more and more system design tasks for their semiconductor collaborators.
To quantify these requirements, Gartner Dataquest has conducted an online survey of system designers. The purpose of this extensive study is to identify the current and future needs of system providers as a guide for developing next-generation ASIC and PLD products. The most-watched ASIC in the survey is also evaluated in this vision. More details can be referenced in the "Technology roadmap for future ASIC and FPGA design" scsi-ww-uw-0002.

Survey method
Gartner Dataquest Company recently completed the 2003 annual online system design survey. End users are identified in a number of ways, including past respondents ' database and engineering journal subscribers. More than 40,000 questionnaires were distributed electronically worldwide. Eventually, nearly 300 complete questionnaires were recovered.
The recovery and processing of survey responses were completed in the third and fourth quarters of 2003. The data collected are mainly from system design engineers, IC designers and engineering managers, which account for more than two-thirds of the effective responses.

Main findings
In the survey, System designers revealed a number of important trends. These trends will drive the need for ASIC, Field Programmable gate Array (FPGA) and Chip system (SOC) devices in the future. Major ASIC and SOC discoveries include the following:
-As users begin to face the challenge of designing 90 nm products, the Supplier technology roadmap has become increasingly important;
-nearly 10% of respondents began to use encapsulated inner system (SIP) in the unit based IC design;
-design services increasingly tend to serve regional markets, especially in the Asia Pacific Rim region;
-More and more processor cores, such as PowerPC, are used in ASIC and FPGA design;
-The standard interface SPI-4.1 and SPI-4.2 are fiercely competitive with the RapidIO Interconnect architecture and Ethernet Connection Unit interface (XAUI);
-After a false expansion three years ago, the need for embedded DRAM has rebounded again.

Key factors in selecting ASIC vendors
Given the large number of variables and suppliers, it is a good technique to select an ASIC vendor in the current market. To get a better understanding of how system designers choose ASIC vendors, Gartner dataquest companies to rank the importance of the various factors that are considered when selecting an ASIC vendor. Figure one shows the results of the survey, with 1 representing the least important, and 7 representing the most important.

Figure I
key factors for selecting an ASIC vendor
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Because hundreds of electronic automatic design (EDA) toolkits are serviced by the ASIC industry, it is not surprising that over the next year users see better integration with Third-party tools. The EDA industry is relatively loose, so the most important thing is for the suppliers to invest enough to support the latest design and ensure that these tools work in a compatible environment.
users tend to keep in close contact with a series of ASIC vendors, as this is a necessary factor to ensure their success. Users will choose the suppliers who have a good record in the vertical market they serve and those that provide specific IP design for the user's target market. Individual device costs and one-time investments are always important to the user, so they score high on these factors. Compared with past findings, the importance of suppliers having a leading technical roadmap is greatly improved. The supplier is measured by the time and performance of the 65 NM ASIC products provided by the supplier. Energy loss in the form of leakage current is a difficult problem, and users want to know how the supplier solves this thorny problem.
Cot mode and ASIC mode
System designers have been studying whether moving from ASIC mode to cot mode (customer-owned tool mode) can reduce their design costs. While some companies are successful in this conversion process, other companies believe that the cot model is not a good choice. In this way, there must be significant upfront investment in design tools and infrastructure, which is too large for many companies. The companies that have successfully transformed into cot models are often big companies that do a lot of design. Figure II shows an overview of the design business model based on our system Designer survey. The latest results show that cot retains a certain market share. Some system designers want to optimize the design speed by laying out the layout beforehand in the design room and then sending it to the factory to make this way. To cope with this trend, ASIC vendors have spent extra time optimizing the speed of layout cabling, but they are also adding to the cost of the new service.
    risk is a key factor in choosing cot or ASIC mode vendors. In the cot process, the System Designer assumes full responsibility for ensuring that the design works and is completed in a timely manner. In the ASIC process, these are ensured by the ASIC vendor. This can be a big deal, considering that if a design does not work, it is important to re-examine the high cost of the design and loss of potential market share due to the current and shorter system lifecycle. In addition, because of the increasingly complex design of 130 nm and 90 nm, some providers of dedicated standard circuits (ASSP) have started moving from cot mode to ASIC mode. There are many ways to
Design services
Design services. Participate in ClothingCompanies, such as IBM, which offer a full range of services from encapsulation to design and production of final product chips, and many small-business-like design services companies in Taiwan and mainland China. IBM is one of the largest companies to join the design service on a large scale recently. IBM offers design services as a channel to attract new customers outside of ASIC and production services, enabling customers to benefit from IBM's deep design technology. Other companies, such as Wipro, India, are already providing support for a sizeable commercial design service.
in the Asia-Pacific region, the number of different types of design companies is growing. Faraday, a separate company from Unilever, is one of the largest companies that has acquired hundreds of new ASIC designs and is being produced in a joint-China electronics factory. Many small design shops are located in Taiwan, Korea and mainland China, and they acquire a certain number of small ASIC design projects from the regional market and produce them on behalf of the factory.

Figure II ASIC business model

Encapsulated inner System (SIP)
SIP is a trend that can change the ASIC and electronics industry. SIP has matured so that system designers can reduce the cost of the entire system by using this technology. SIP's concept is to encapsulate multiple chips on a fast substrate that is made together and then install them on a printed circuit board. Another form of SIP is the silicon mold stack, which stacks one type of chip onto another, and then connects the corresponding pins. SIP can be used at the same time as ASIC, and can also replace ASIC device. For example, an ASIC chip can be mounted on a substrate, stacked with flash memory or DRAM, to form the entire SIP. Alternatively, SIP can replace the ASIC. For example, a combination of generic chips, such as microprocessors, analog devices and memory, is packaged together to form a sip, thus replacing the on-chip system ASIC.
SIP is not a new concept, and it is almost the same concept as a multiple-chip module (MCMS) that has been in use for years. The real difference is that SIP technology uses a very fast substrate, and there is no such substrate in the MCM era. MCM is not very successful because it runs too slowly and there is no mass-production drive that can really reduce costs.
SIP technology is now ripe, and its cost is greatly reduced by the largest number of applications in the world for mobile phones. SIP is used on baseband cell phone chips. It is also used in many new applications, including storage and wired communications.
The ASIC is one of the first product types integrated into the SIP. We want a better understanding of how many of the ASIC has been integrated into the SIP, so let respondents vote on it. Figure III shows the percentage of the unit based IC design that began to be integrated into the SIP. According to the respondents ' votes, about 10% of the unit-based IC launches were integrated into the SIP in 2003. It is clear that SIP will be an important aspect of the Gartner Dataquest Company's observations and reports over the next few years.

Figure Three
Encapsulated internal System--a unit-based IC startup design

ASIC core components and embedded features
As all production processes are upgraded, the number of logic gates increases dramatically, allowing designers to start looking for new ways to design them. Over the past 10 years, the increasing use of IP cores and chip memory has become a trend. Memory now accounts for about One-third of the designed chip area and is expected to grow to more than half the chip area over the next five years.
Figure Four compares the core components of the gate array and the unit based IC design. Gate array design generally has more logical lines, and based on the unit IC has more analog devices and embedded IP core.

Figure Four
2003 estimates for the ASIC startup design core components
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Memory Trends
Demand for on-chip storage prompted designers to explore more new types of memory in accordance with the standards of speed and density. Static random access memory (SRAM) has been available for many years and is currently the most popular memory type. Embedded dynamic random access memory (DRAM) appeared a few years ago, but it did not have a good start in industry, because of the drop in the price of single chip dram, so the users did not use embedded DRAM in time because of the cost difference. Embedded DRAM is now a renewed interest and has begun to be used in a number of ways. Sony has introduced embedded DRAM in the image processing part of its developed gaming machine, which is one of the largest applications of the embedded DRAM ASIC. Cisco uses an embedded DRAM ASIC in its low-end router, which is growing significantly. IBM manufactures the embedded DRAM ASIC for Cisco, and it claims that about one-third of the new 0.13 micron ASIC design now contains embedded DRAM. Embedded DRAM is also emerging in some consumer applications, including digital cameras and plasma displays.
Toshiba, NEC and Samsung are also starting to look favorably on the embedded DRAM ASIC. Now is the right time for the embedded DRAM ASIC to be recognized by the market. This increase in market acceptance is based on 1t-sram losses. Figure V shows the demand for embedded DRAM in a modular IC design based on the poll respondents ' votes. Embedded Flash will have a steady demand growth based on the respondents ' information, but as shown in figure five, this requirement is not implemented because of the presence of SIP. Many system designers find it much cheaper to install common flash memory onto the ASIC using SIP.

Figure Five
The expected demand of embedded memory--based on unit IC startup design

Standard interface
The current interface has become a key part of ASIC design. Considering that there are many different standard interfaces in industry, we need to ask the user which interface they are using and plan to use. Figure six shows the standard interfaces used in ASIC design.
The key elements of the standard interface survey results are as follows:
-The increased use of SPI-4.1 and SPI-4.2 in the 2003 means the growth of standard interface applications on communication line cards, making the combination of dedicated and standards-based circuit functions more flexible.
The growth of the-XAUI is due to its application in the high speed backplane and the appearance of 10Gbps Ethernet in the Enterprise Conversion Center.
-xfi is also in the early stages of development and will develop with 10Gbps XFP transceiver modules.
-The use of standard interfaces in communication systems facilitates versatility between ASIC and ASSP components in the design.

Figure Six
Standard interface-asic Startup design

Gartner Dataquest Company forecasts
Designers say they will use advanced technology, but only if prices are low. Costs are still the most important, but the electronics industry is running periodically, with the emphasis on swinging between controlling costs and adopting more advanced technologies. Now the electronics industry is moving from the lowest point, the cost of control, to better times. System designers will take the risk of using advanced technology to differentiate their products. The next two years were an exciting two years for companies that offered advanced technology.