dlab

and com4 use interrupt 3.Chapter 3 registers1 register groupThe register group of COM port is shown in the following table. There are 12 registers and 8 addresses are used. Some registers share one address, which is distinguished by dlab = 0/1. Dlab is the 7th-bit line control register.Base AddressRead/writeRegister abbreviationDescription0Write-Sending holding register (

Frequency lock register (urdlm and urdll) Urrbr, urthr, and urdll share the same address.When the dlab bit of the urlcr register is 1All accesses to the shared address are urdll; when the dlab bit of the urlcr register is 0, the read operation on the shared address will access urrbr (receiver er buffer register), and the write operation on the shared address will access urthr (transmitter holding registe

program of BF533: Void uartinit (unsigned short Div) { * Puart_gctl = 0x0009; ---- (1) * Puart_lcr = 0x0080; ---- (2) * Puart_dll = div; ---- (3) * Puart_dlh = div> 8; ---- (4) * Puart_lcr = 0x0003; ---- (5) * Puart_ier = 0x0001; ---- (6) } Through the previous study of various registers on the serial port, we can easily understand the role of each statement. The role of sentence 1st is to enable serial clock, and when the serial port is idle, the serial line is pulled up; the sentence 2nd mean

FIFO is not triggered and exceeds the delay time, half of the delay time is 4-5 times of the sending time, a timeout interruption occurs, in this case, the incomplete data in the FIFO can be read. Note: If the FIFO trigger point is set to 8 characters and the current FIFO contains 4 characters, sending is suspended, and timeout interruption occurs, this will occur and one character will be read after each interruption, wait for the remaining characters in the FIFO, interrupt again, and so on. 3

-buff1024.c *//* Written by: Craig peacock # Include # Include # Include # Define PORT1 0x3F8/* Port Address Goes Here */# Define INTVECT 0x0C/* Com Port's IRQ here (Must also change PIC setting )*//* Defines Serial Ports Base Address *//* COM1 0x3F8 *//* COM2 0x2F8 *//* COM3 0x3E8 *//* COM4 0x2E8 */Int bufferin = 0;Int bufferout = 0;Char ch;Char buffer [1025];Void interrupt (* oldport1isr )();Void interrupt PORT1INT ()/* Interrupt Service Routine (ISR) for PORT1 */{Int c;Do{C = inportb (PORT1 +

[5:0] From pll_ctlMsel = 0x3f; // clear all bits unique T msel [] /* Read SSEL from pll_div register */SSEL = * ppll_div;SSEL = 0x0f; // clear all bits unique t ssel [] /* Divisor calculation:* Sclk = (msel * clkin)/SSEL if df = 0* Sclk = (msel * clkin/2)/SSEL if df = 1* Divisor = sclk/(16 * baud_rate)*/Divisor = (msel * clkin)/(SSEL * 16 * baud_rate )); If (* ppll_ctl 0x1) // If df = 1, clkin/2 is going to PLL{Divisor/= 2; // divide by 2} /* Baud rate setup: 115.2 kbps */* Puart_lcr | =

registerUart_dll UART Baud rate configuration Low 8-bit registerUART_DLH UART baud rate configuration High 8-bit registerUart_ier UART Interrupt Enable registerUart_iir UART Interrupt Recognition RegisterUART_LCR UART Line Control registerUART_MCR UART Modulation Control registerUART_LSR UART Line Status registerUART_SCR UART Staging RegisterUART_GCTL UART Global Control Register# #例子代码分析*puart_gctl=0x0009; *puart_lcr=0x0080;//dlab=1 allow access to

If Keil arm is used, vpbdiv = 0x00000000 is automatically generated in startup. S, which leads to fpclk dividing by 4. The baud rate is reduced by four times. The default value of startup. s in Keil is as follows .; // ; // ; // ; // ; // ; // ; // ; // ; // ; // ; // Vpbdiv_setup equ 0vpbdiv_val equ 0x00000000 we will change it: Vpbdiv_setup equ 1 Vpbdiv_val equ 0x00000001 Solve the problem. # Include # Include "config. H" # Define uart_baud (baud) (unsigned INT) (fosc * pll_m)/(baud