Type |
Name |
Binary Code |
Register description |
Multi-function register |
Al |
0 |
The accumulation register has eight lower bits. |
Ah |
100 |
The accumulation register has eight lower bits. |
Ax |
0 |
16-bit accumulate register |
Eax |
0 |
32-bit accumulate register |
BL |
11 |
Base Address Register eight bits |
BH |
111 |
Base Address Register eight bits |
BX |
11 |
16-bit base address register |
EBX |
11 |
32-bit base address register |
Cl |
1 |
Eight-bit low counting register |
Ch |
101 |
Eight-bit low counting register |
CX |
1 |
16-bit counting register |
ECX |
1 |
32-bit counting register |
DL |
10 |
8-bit low data register |
DH |
110 |
8-bit low data register |
DX |
10 |
16-bit data register |
EdX |
10 |
32-bit data register |
Pointer register |
SP |
100 |
16-bit Stack pointer register |
ESP |
100 |
32-bit Stack pointer register |
BP |
101 |
16-bit base address pointer register |
EBP |
101 |
32-bit base address pointer register |
Address Change register |
Di |
111 |
16-bit target address register |
EDI |
111 |
32-bit target address change register |
Si |
110 |
16-bit Source Address Register |
ESI |
110 |
32-bit Source Address Register |
Special register |
IP |
* |
16-bit instruction pointer register |
EIP |
* |
32-bit instruction pointer register |
Flags |
* |
16-bit mark register |
Eflags |
* |
32-Bit Flag register |
Segment register |
CS |
1 |
CodeSegment register |
DS |
11 |
Data Segment register |
Es |
0 |
Additional segment register |
SS |
10 |
Stack segment register |
FS |
100 |
Flag register |
GS |
101 |
Global segment register |
Control Register |
Cr0 |
0 |
Control Register zero |
CR1 * |
1 |
Control register 1 |
CR2 |
10 |
Control register 2 |
303. |
11 |
Control register 3 |
CR4 |
100 |
Control Register 4 |
Cr5 * |
101 |
Control Register 5 |
Cr6 * |
110 |
Control register 6 |
Cr7 * |
111 |
Control Register 7 |
Debug register |
Dr0 |
0 |
Debug register zero |
DR1 |
1 |
Debug register 1 |
Dr2 |
10 |
Debug register 2 |
Dr3 |
11 |
Debug register 3 |
DR4 * |
100 |
Debug register 4 |
DR5 * |
101 |
Debug register 5 |
Dr6 |
110 |
Debug register 6 |
Dr7 |
111 |
Debug register 7 |
Task register |
Tr0 |
0 |
Task register zero |
Tr1 |
1 |
Task register 1 |
Tr2 |
10 |
Task register 2 |
TR3 |
11 |
Task register 3 |
Tr4 |
100 |
Task register 4 |
Tr5 |
101 |
Task register 5 |
Tr6 |
110 |
Task register 6 |
Tr7 |
111 |
Task register 7 |
Floating point register |
St0 |
0 |
Floating point register zero |
ST1 |
1 |
Floating point register 1 |
St2 |
10 |
Floating point register 2 |
St3 |
11 |
Floating point register 3 |
St4 |
100 |
Floating point register 4 |
ST5 |
101 |
Floating point register 5 |
St6 |
110 |
Floating point register 6 |
St7 |
111 |
Floating point register 7 |
Multimedia registers |
Mm0 |
0 |
Media register zero |
MM1 |
1 |
Media register 1 |
Mm2 |
10 |
Media register 2 |
Mm3 |
11 |
Media register 3 |
Mm4 |
100 |
Media register 4 |
MM5 |
101 |
Media register 5 |
Mm6 |
110 |
Media register 6 |
Mm7 |
111 |
Media register 7 |
Single command stream and multi-data stream register |
Xmm0 |
0 |
Single-instruction stream and multi-data stream register zero |
Xmm1 |
1 |
Single command stream and multi-data stream register 1 |
Xmm2 |
10 |
Single command stream and multi-data stream register 2 |
Xmm3 |
11 |
Single command stream and multi-data stream register 3 |
Xmm4 |
100 |
Single command stream and multi-data stream register 4 |
Xmm5 |
101 |
Single command stream and multi-data stream register 5 |
Xmm6 |
110 |
Single command stream and multi-data stream register 6 |
Xmm7 |
111 |
Single command stream and multi-data stream register 7 |
Note: The English name "*" is used as a reserved domain and is not actually used. The binary code "*" indicates that no binary number is required. |