CPU and DSP

On the surface, DSP and standard microprocessor have many areas in common: An ALU-centered processor, address and Data Bus, Ram, Rom, and I/O port, in a broad sense, DSP, microprocessor, and microcontroller (Single Chip Microcomputer) all belong to the processor. It can be said that DSP is a kind of CPU. However, the DSP is different from the general CPU:

Architecture: The CPU is Feng. while the DSP has separate code and Data Bus, namely, the "Harvard structure ", in this way, multiple memory accesses can be performed within the same clock cycle-this is because there are often several groups of data buses. With this architecture, the DSP can retrieve one instruction and one or two (or more) operands in a single clock cycle.

Standardization and versatility: The CPU standardization and versatility are well done and support the operating system. Therefore, the CPU-core system facilitates human-computer interaction and communication with standard interface equipment, which is very convenient and does not require hardware development; however, this also makes the CPU peripheral interface circuit more complex. DSP is mainly used to develop embedded signal processing systems. It does not emphasize human-computer interaction and generally does not require many communication interfaces, therefore, the structure is relatively simple for development. If you only focus on embedded applications, the difference between the embedded CPU and DSP should be only one focusing on control and one focusing on calculation.

Pipeline Structure: Most DSPs have a flow structure, that is, each instruction is completed by multiple functional units in the chip, such as finger fetch, decoding, number fetch, and execution, this greatly improves the system execution efficiency. However, the adoption of pipelines also increases the difficulty of software design, requiring designers to consider the need for flow in program design.

Fast Multiplier: Signal processing algorithms often use a large number of multiply-accumulate (MAC) operations. The DSP has a dedicated hardware multiplier that can complete Mac operations within a clock cycle. The hardware multiplier occupies a large part of the DSP chip area. (In contrast, a general-purpose CPU uses a slow, iterative multiplication technique that completes a multiplication operation within multiple clock cycles, however, it occupies a relatively small amount of silicon wafer resources ).

Address Generator: The DSP has a dedicated hardware address generation unit, which supports the specific data address modes required by many signal processing algorithms. This includes the plus (minus), the modulo address of the ring data buffer, and the bitwise inverted address of the FFT. The address generator unit works in parallel with the main ALU and multiplier, which further increases the workload that the DSP can complete in a clock cycle.

Auxiliary hardware cycle: Signal processing algorithms often need to execute a close command loop. The support for the hardware auxiliary loop allows the DSP to efficiently execute code blocks cyclically without stopping the pipeline or allowing the software to test the cyclic termination conditions.

Low Power Consumption: The power consumption of DSP is small, usually between 0.05 and 4 W. It uses a low-power DSP or even only W. It can be powered by a battery and is suitable for embedded systems; the CPU power consumption is usually more than 20 W.