1. If the SPI speed cannot exceed 15 MB, a serious error will occur. 2. If the receiving method is interrupted, the spiccr character Length Control bit determines the interrupt length. For example, if the word length is 8 and the interrupt level is 1, an interruption occurs every time one byte is received. If the word length is 16 and the interrupt level is 1, an interruption occurs every two bytes. 3. Note that the polarity of the master mode and slave mode must be the same. The main mode is the rising edge sampling, and the falling edge output. The slave mode should also sample the rising edge and output the falling edge. Otherwise, the sampling data is inaccurate. 4. Note that the data is written to the spitxbuf on the left alignment, while the data is read to the spirxbuf on the right alignment. This problem is not prominent in the case of 16 characters. However, you must pay special attention to the length of the data below 16 characters. The general method is to perform the Left shift operation. 5. Pay attention to the usage of spi fifo.
The biggest problem I encountered during the debugging process was data loss, which had been plagued for many days. Later, I found out the cause. Because the SPI FIFO enhancement function is enabled, the sending data cannot be paused Based on spiaregs. spists. Bit. buffull_flag. Because txbuf obtains data from the Tx FIFO. In the program, txbuf is written, but the write buffer is FIFO. Based on the principle of first-in-first-out, if you continuously write data to txbuf, the first-in-first-out always saves the data you finally write, instead of the spiaregs. spists. bit. buffull_flag position 1, so data is lost. The correct method should be used to determine the number of characters in the spi tx fifo. If the sending FIFO contains 16 characters, stop sending new data and wait for the host clock on the SPI bus to remove the data from the txbuf, A word is automatically loaded into txbuf before new data can be sent.
