Computing power is not an absolute advantage Intel Xeon Phi parsing

This June Intel released the new Xeon Phi Coprocessor family and has progressively disclosed details of Xeon Phi. According to the data, Xeon Phi uses up to 5 billion transistors of VLSI, and uses a 3D transistor and more advanced technology such as 22 nm. So what kind of product is Xeon Phi? This article will look at the general situation of Xeon Phi with some details.

Architecture design for Xeon Phi:

First, let's talk about Xeon Phi. The difference between a coprocessor and a conventional processor. Xeon Phi is a product that can achieve multithreading, at present we are in Nehalem, Sandy http://www.aliyun.com/zixun/aggregation/16410.html ">bridge and Ivy It is possible to see multithreading on bridge processors, but most of their multithreading is spent on redundant computing resources. Xeon Phi is different, although it is a product from the X86 processor, more strictly its prototype is the Pentium processor, but compared with the CPU, Xeon phi in each of the physical core integration of 62 computing cores, and has 512bit SIMD units, So that it can achieve four thread parallel processing, can be said to be purely for the implementation of multithreading and launched.

But the four launch of Xeon Phi is only theoretical, because in most cases 4 threads are affected by memory latency, and the best state is two-thread parallel processing.

Also Xeon Phi differs from the X86 processor. Only 2% of the logical operators in Xeon Phi use the X86 instruction, although there is a correlation but Xeon Phi's SIMD does not support MMX, SSE or AVX, but uses its own proprietary instruction set.

There is a design on Xeon Phi similar to the Xeon E7 processor of the sandy Bridge-ep kernel, which is the internal structure. Xeon Phi uses a two-way ring structure on the connection between the cores, supports 8-channel memory, supports up to 8GB in memory capacity, and consolidates the PCIe controller.