Intel, IBM, Toshiba, Samsung are all adopting the 14nm process

Moore's law is the influence parameter that drives the integrated circuit performance forward. In the past few decades, the number of integrated circuits has doubled every two years. Now that the pace has been overtaken?

At least 14nm process and FINFET technology developers see this. Intel, IBM, Toshiba and Samsung are all adopting the 14nm process, and will invest in FinFET production as soon as the research and development work is completed.

FinFET technology, developed by researchers at the University of California, Berkeley, can lead to significant performance improvements, including the ability to strictly control the short channel effects in sub-micron levels and reduce short state currents.

And the technology can be a single transistor as a multiple-door device. The use of experimental brake-pole stacking materials and device architectures can also significantly affect the properties of analog devices.

Figure 1:14nm process is inherently cheaper and simpler. Because the embedded oxide layer can prevent etching, it makes etching very simple.

IBM in action

IBM has begun to switch to the FinFET technology of 14NM nodes, SOI (silicon on the insulating layer) wafer. In fact, the company intends to adopt a SOI wafer on all 14nm products, including the server processor used internally by IBM and the externally provided ASIC.

Gary Patton, vice president of the IBM Semiconductor Research Center, recently explained the advantages of SOI relative to block silicon (bulk silicon) wafers in the Public Platform Technology Forum, "the process complexity is reduced because the embedded oxide layer prevents etching and makes etching very simple." And the cost of 14nm has been solved.

Fundamentally, this means that the reduction of the 14nm process steps has already offset the cost of the SOI wafer. The further advantage of SOI is the low incidence of soft errors.

IBM has developed DRAM devices through SOI technology. The Company believes it is quite true that it is relatively straightforward to use the technology for vertical configuration devices.

Other manufacturers

Fishkill Alliance manufacturers, including Samsung, GlobalFoundries and Toshiba, are ready to put into operation the FinFET of 14NM nodes. In addition, IBM also developed planar SOI Technology in association with the Italian-French microelectronics and Leti, with a view to squeezing its potential.

Similarly, the research organization IMEC also developed an earlier version of the Process Development Kit (PDK) for 14nm logic chips. The PDK is aimed at a range of new technologies, including FINFET and Ultra Ultraviolet (EUV) lithography.

IMEC and its partners are using the PDK to develop 14nm test chips, which will be released later this year. The chip can promote interconnection, process, lithography elements and circuit performance within 14NM nodes.

Compare the attitude of other companies to 14nm. TSMC (TSMC), although it has already announced plans to adopt FinFET technology, does not intend to push the technology to its customers before the 14NM node becomes the mainstream process.

As early as 2002, TSMC demonstrated a product called Omega FinFET, a 25nm transistor capable of working under 0.7V. But the product finally failed to commercialize.

There is reason to believe that these companies ' shift to 14nm FinFET technology will surpass Moore's Law's initial estimate of the number of transistors doubling twice a year.

There are anecdotal reports that Intel has tried to move from 14nm to 8nm in the next few years. Is it time for Moore's law to go into the slow lane? Perhaps, the only doubt is that the 8nm will go beyond the theoretical operating limits of silicon. What happens then? The answer is graphite.