In the embedded field, Flash is a kind of common storage device, flash flash memory as the main storage device of embedded system has its own characteristics. Fash write operation can only change the corresponding position of 1 to 0, and not 0 to 1, and erase fash is to restore the contents of the corresponding storage block to 1. Therefore, in general, when writing to Fash, the corresponding storage interval needs to be erased, and this erasure is done in blocks (Bock). Flash memory mainly has
When I first learned about wince, I couldn't understand the file storage below wince, or it was easy to confuse. recently, the company is working on a terminal porting project under wince, and encountered some storage problems in the middle. I have been learning wince for some time, now we can talk about some of the storage concepts of wince.
The following storage devices are available on the market based on WinCE: NAND Flash, nor flash, and SDRAM,
Power on ResetEnv. OS _auto_flag = 1Nand flash Boot
Please select function:0: USB download file1: UART download file2: Write NAND Flash with download file3: Load pragram from NAND Flash and run4: erase NAND Flash regions5: Write nor flash with download file6: Set boot Params7: Set autoboot parameter, 1: Linux 2: WinCESet boot Params = root = 1f02 init =/linuxrc c
Title: norflash LearningTags: ArmDate: 18:31:59---Norflash: learning the difference between nor and NAND Flash
Nor
Nand
Capacity
1 ~ 32 MB
16 ~ 512 MB
Xip executable program
Yes(Because it is a memory interface)Allows random access to data from any address.
No
Erased
Very slow (5S)
Fast (3 ms)
Write
Slow
Fast
Read
Fa
read at startup is
0x00
,
Divided
NAND Flash
And
Nor flash
.
Nor flash
Has its own address line and data line,
Similar
Memory
Random Access Method,
In
Nor flash
You can directly run the program,
So
Nor flash
Can be directly used
Boot
,
Use
Nor flash
During startup
Address
Ing
To
0x00
.
Mini2440
Directly
Vivi
Directly burned in
Nor flash
.
NAND Flash
Yes
Io
Devices, Data, addresses, and control lines are
File System
As the main storage medium of embedded systems, flash memory has its own characteristics. The Flash write operation can only change 1 of the corresponding position to 0, but not 0 to 1 (flash erased restores the content of the corresponding storage block to 1). Therefore, generally, when writing content to flash, you must first erase the corresponding storage range. This erasure is performed in blocks.
First, flash (flash memory) is the main storage medium for embedded systems, main
I am using TI's dm368 Development Board. The kernel is 2.6.32.17, and the default FLASH file system is jffs2. However, jffs2 is in a large partition, and the Mount speed is very slow and occupies a large amount of Ram. Therefore, I want to use ubifs to see if the performance is better.
The principles and configuration process of ubifs are introduced on many web pages. I will provide a link for you to see. I will not repost it, I will focus on the problems I encountered and solved during the tran
Burn write kernel + burn Write file system (jz2440-s3c2440)
(a) using DNW to write the kernel 1, set the Development Board to NOR start, connect the usb-serial cable (USBCOM1 port 2, using the DNW tool, first "Serial Port" in the "Connect". Use transmit in the "USB Port" menu to send a write to burn uimage
File. The development Board will automatically burn the program to NAND Flash when it receives the file.
(ii) Use TFTP to burn the kernel 1,
exampleIf a device occupies two memory areas, two ioresource_mem resources can be defined.
Note: Device Name and ID
The platform_device.dev.bus_id is the canonical name for the devices. It's built from two components:
* Platform_device.name... which is also used to for driver matching.
* Platform_device.id... the device instance number, or else "-1" to indicate there's only one.
These are concatenated, so name/ID "serial"/0 indicates bus_id"Serial.0", and "serial/3" indicates bu
Development Environment: fedora 9Tool chain for cross-Compilation: Arm-Linux-GCC 4.3.2 with EabiEmbedded Linux kernel version: 2.6.29.4-friendlyarm. I cannot remember the details when I wrote the post yesterday. I started the development board today and checked it with uname-R, which is 2.6.29.4-friendlyarm. The post has been changed. This article is based on the kernel version of 2.6.29.4-friendlyarm. Other versions should be similar for reference only.Development Board: mini2440-128M
medium of embedded systems, flash memory has its own characteristics. The Flash write operation can only change 1 of the corresponding position to 0, but not 0 to 1 (flash erased restores the content of the corresponding storage block to 1). Therefore, generally, when writing content to flash, you must first erase the corresponding storage range. This erasure is performed in blocks.
Flash Memory mainly includes the nor and NAND technologies (for a si
S3C2440Study on startup Methods
No matter what the Startup Device of S3C2440 is, it starts to execute the program from the 0x0000 0000 address. The difference is that the address ing is different. After power-on for an embedded system based on S3C2440, You need to select the boot device first. The 2440 Boot Mode is configured by the mode pins om1 and om0. The 2440 Boot Mode is described as follows:
Figure 1 Startup Mode of S3C2440
We can see that the S3C2440 supports two startup modes:
Dm365 has two boot modes, which are determined by the bootsel [] pin. When it is 001, it is directly started from aemif, such as nor and onenand. In addition, it is started from RBL, the order is RBL-UBL-UBOOT-KERNEL, such as NAND, serial port, SD card, etc. RBL searches for block1 to block24 to find UBL. For details about RBL startup, refer to the document about the arm subsystem in the User Guide. The following only analyzes the UBL source code.UBL
to the bank, therefore, the ARM core only needs to issue an address, and the storage controller of the S3C2440 just needs to interpret the address into two parts: one is the Bank address, and the other is the address connected to the internal address of the bank memory.
As a 32-bit CPU, the address range can theoretically reach the power of 2 to 4 GB. Apart from the above 1 GB address space, there is also a part of the address of the internal CPU register, the remaining address space is not use
"Flags" = DWORD: 1000; this flag specifies that the driver is loaded only once in Boot. HV.
[HKEY_LOCAL_MACHINE \ SYSTEM \ storagemanager \ profiles \ pocketstore]"Defaultfilesystem" = "fatfs""Partitiondriver" = "mspart. dll""Automount" = DWORD: 1"Autopart" = DWORD: 1"AutoFormat" = DWORD: 1"Mountasbootable" = DWORD: 1; this is the key to specifying this partition in wince 5.0 to save system. HV"Folder" = "HDD""Name" = "NAND drive""IOCTL" = DWORD: 4[HK
U-boot kernel, file system download mode, u-boot Kernel1 Preparation 1.1 TFTP server
The host computer uses the Ubuntu system. The installation method of the TFTP server is as follows:
$ Sudo apt-get install tftpd-hpa
Open the tftp configuration file in the path:/etc/default/tftpd-hpa, as shown below:
TFTP_USERNAME = "tftp"TFTP_DIRECTORY = ""TFTP_ADDRESS = "0.0.0.0: 69"TFTP_OPTIONS = "-l-c-s"
Here, TFTP_DIRECTORY indicates the path determined by the file downloaded
other for storing code that has little to do with hardware.
5. Are all ARM chips automatically copy the first 4 K of NAND to the memory of the chip after power-on? A: Only a few Samsung chips are like this. The chip that supports NAND boot also has this process: the chip-solidified program reads the NAND to the memory and then starts it.
6. how do I establish
: jffs2, yaffs, cramfs, romfs, ramdisk, ramfs/tmpfs, etc.
1. FLASH-based File System
As the main storage medium of embedded systems, Flash memory has its own characteristics. The Flash write operation can only change 1 of the corresponding position to 0, but not 0 to 1 (Flash erased restores the content of the corresponding storage block to 1). Therefore, generally, when writing content to Flash, you must first erase the corresponding storage range. This erasure is performed in blocks.
Flash Mem
real storage is only 4 kb.Address range of static memory area is from 0x1000_0000 to 0x3fff_ffff.Srom, SRAM, nor flash,Asyncronous nor interface device, onenand flash, and steppingstone can be accessed by this address area.Each area stands for a chip select, for example, address range from 0x1000_0000 to 0x17ff_ffff (128 M) stands for xm0csn [0]. start address for each chip select is fixed. NAND Flash and CF/ATA cannot be accessed via static memory a
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