learn x86 assembly

5.0 Compilation Optimization Overview Optimization is a very important thing. As a program designer, you certainly want your program to be small and fast. Many of the DOS times have mentioned that "a certain compiler can generate very compact code", in other words, the compiler will reduce the code as much as you can if you use the functionality it provides correctly. Currently, the popular C + + compiler on the Intel x86 system, including the Intel

Preliminary study on 2.1 x86 system structure Preliminary study on computer system of 2.1.1 80x86 The word cell address is represented by its low address. Byte and byte access is the minimum mode of memory access, the basic unit of access. For x86, because it takes a small-end storage mode, the Word cell address is represented by its low-level address. 2.2.1 80x86 processor and protection mode preli

register the information of these stacks for temporary preservation in the TCB (e.g.).The steps for creating a stack of the X (x=0,1,2) privilege level are as follows:1. Apply for memory, allocate space for stack;2. Create a stack segment descriptor (DPL=X) in the LDT;3. Register the Stack's information in the TCB, including the stack size, base address, selector (rpl=x), and initial value of espx (=0);I think the size of the stack and the registration of the base site is not necessary, because

You can display the time by loading the RTC Interrupt program with the loader of the previous operating system kernel loader (x86 assembler).; user.asm; The header file of the program, the information table of the whole program;--------Header-----------------------------------section header align=16 vstart= 0program_length DD program_endprogram_entry DW start DD section.code.startsection_count DW (sectio N_end-section_begin)/4section_begin:section_cod

8086 Register:The concept of a register without an address refers to the memoryData registers:AX (AH AL) accumulatorBX (BH BL) Base RegisterCX (CH CL) Count registerDX (DH DL) data registerSegment Register: (Storage of various segments of the first address)CS Code Snippet registers the first address of the instruction in memory that is currently being processed (Physical address = (csDS Data Segment Register current data in memory of the segment header address (Physical address = (dsES additiona

1. Summarize real mode (16-bit), 16-bit protection mode, 32-bit protection mode in one sentence.16-bit real mode, addressing: Sg+offset (16-bit), segment register +offset is memory address, no segment description table, direct read memory, segment only logical meaning (code snippet?). Data segment? such as16 is the protected mode, addressing the Sg+offset (16-bit), the segment register is the ID of the Segment Description table, the table entry records the true segment address, and whether the s

o'clock transfer; The JE directive means that when the zf= (1) is calculated, the result is 0 o'clock transfer; The JNZ directive means that when the zf= (0) is not transferred when the result of the calculation is not (0); The JNE directive means that when the zf= (0) is not transferred when the result of the calculation is not (0); 2:CMP AX,BXJA LBBJe lbzJB LBLThe 1th Chapter Exercises:Detection Point 12.2: The current stack segment descriptor B bit is 1, the base address is 0x00700000, the

When you encounter some underlying problems with the x86/x64 platform in actual work, you may often go through the manuals provided by Intel or AMD if you do not understand them, I need to refer to the Manual next time I encounter a problem. Now let's systematically learn the knowledge of X86/x64 systems, and then learn