Apple's desktop and server, Nintendo's GAMECUBE,IBM, and its own blue Gene supercomputer use PowerPC chips.
Today, the Power PC family has three product lines, namely the embedded Power PC 400 series, the Power PC 700 and the Power PC 900 series. Historically, there is also a power PC 600 series that is most noteworthy because of its excellent performance.
1. Power PC 600 Series
Power PC 601, the first i
Original address: http://blog.chinaunix.net/uid-26675482-id-3358038.html
Abstract: The introduction of the device tree reduces the changes required by the kernel to support new hardware, improves code reuse, accelerates the development of Linux support packages, and enables a single kernel image to support multiple systems. As a dynamic between the U-boot and the Linux kernelInterface, this paper describes the data storage format of the device tree and the source code description syntax, and the
Recently, a FPGA was added to the PowerPC board, and the PCI-e was debugged when a PCI-E was used to connect the board. Since VxWorks itself has already written the driver, it can be called directly during use, but soon the problem arises: at first, the MMAP method was directly used to map the FPGA bus to the application's memory space and try to read and write. This method is relatively simple and does not need to be copied between the kernel and the
Advantages of PowerPC over arm:
With its outstanding performance and high integration and advanced technology, PowerPC chips are used in network communication applications, industrial control applications, home digitalization, network storage, military fields, power System Control is widely used. because PowerPC is cheaper than arm devices
Tools are pirated every
Before learning about the Interrupt Processing Mechanism, let's take a look at the interrupt source of PowerPC. Here we use the e300c3 kernel. From the perspective of the e300 core, the interrupt source can be divided into exceptions and external interruptions, exceptions are generated by the e300 kernel, such as illegal commands or TLB Miss during memory access. This situation is too complicated. If we do not go into the details, the interruptions me
This section describes part of the PowerPC-based second-stage Linux Startup Process. MMU initialization involves a large amount of content and a large amount of code. This section continues to describe the MMU hardware initialization and final MMU enabling process.
Before getting started, I first pointed out an error in the previous article. When I introduced the RFI instruction in the mmu_off function, I thought it was an interrupted return, but then
Following the PowerPC platform Linux Migration Two, a single Board mount NFS Network File system is implemented.1.ubuntu Installation Configuration Start NFS ServiceSee http://blog.csdn.net/u010216127/article/details/8825735 for detailed procedures.= = NFS 0x3000000 10.3.56.9:/home/freescale/work/nfs_root/hellospeed:100, Full DuplexUsing eTSEC2 DeviceFile transfer via NFS from server 10.3.56.9; Our IP address is 10.3.56.242Filename '/home/freescale/wo
Attention:Some operations may not cause the hardware to automatically perform contextual synchronization. For example, when we pass the tlbwe directiveWhen updating the Utlb page table, the hardware does not automatically perform contextual synchronization, that is, the shadow register is not automatically invalidatedCache (if there is a page table in the shadow cache that has already been invalidated, if there is a newMay cause an unknown problem); If you want to make the update
key function are debugged according to the Uboot initiation process. Ensure that the uboot normally starts into the command line.(3) separate debugging for each module driver. So I modify the boards.cfg, modify the configuration file, determine the first address of the code snippet, memory header address and other basic elements. Expectations can be directly compiled. But after looking at the link script for the ppc460s processor, I think the problem is a little more complicated than I thought
Based on the PowerPC platform U-boot porting, the porting of the Linux kernel is as follows:1. Modify the top level makefileARCH = PowerPCCross_compile? = powerpc-linux-gnu-2. Configuration[Email protected]:~/work/source/linux-2.6.35-r2$ make P1010rdb_defconfigDrivers/net/kconfig:109:warning:choice value used outside its choice groupDrivers/net/kconfig:115:warning:choice value used outside its choice group*
Host:mintNGINX version:nginx-1.5.8 (Nginx-1.5.8_arm.tar)ZLIB version:zlib-1.2.8PCRE version:pcre-8.33Nginx incredibly does not support cross-compilation, configure inside no existing parameters can be set.But fortunately provided--WITH-CC--with-cpp.The latest Pcre version on the web is 10.0,nginx use this version will have a problem (Pcre2), the recommended use of pcre-8.33.1../configure--prefix=/disk2/nginx/install--with-zlib=/disk2/zlib/zlib-1.2.8--with-pcre--with-pcre=/disk2/pcre /pcre-8.33--
Linux has always been very good at hardware support, many of the old and all because of the Linux can be supported by the Linux operating system. However, the author recently learned that due to the user community and the frequency of the relationship of multiple Linux distributions have begun to quietly give up support PowerPC. As a result, PowerPC users will lose support for the latest mainstream Linux (p
Linux general technology-Linux programming and kernel information, which is a strange problem of PowerPC kernel transplantation, is described below. How to port a PowerPC-Based Kernel
My system is based on mpc3167, the kernel is using a linux-2.6.10, u-boot version is 1.1.5,
Use tftp to download the uImage to the target board. After decompression, the serial port is not printed. The following content is di
During this period of time, we need to get the debugging and driver development work related to PCI Express. The old rule is that we should first look for information on the Internet. This kind of stuff is quite rare and we have already bought a book, I plan to summarize it by myself. This article describes how to configure the PCI bus in PowerPC.
PowerPC uses a mechanism called FDT flat device description
PCI bus specifies the bus transaction that accesses the configuration space, which is called the configuration read/write transaction. Unlike the storage access transactions that use the storage address for access, the idnumber is used for addressing access to the PCI configuration space.
The ID of a PCI device consists of the bus number, device number, and function number.
For Embedded PowerPC applications, the PCI design is often very simple. The PC
I386 = intel 80386. In fact, i386 is generally used as a general term for Intel (Intel) 32-Bit Microprocessor
Amd64, also known as "x86-64" or "x64", is a 64-bit computer processor architecture. It is based on the existing 32-bit X86 architecture and developed by AMD.
The CPU of the server that uses EPIC technology for IA64 intel64-bit processor is anteng itanium (development code: Merced)
PowerPC is a type of CPU with a balanced architecture. Its
Recently, the boss asked me to introduce the experience of BSP development at the weekly meeting.Because there are foreigners in the group, they must also speak English.It's a great opportunity to practice English.It is expected to be an hour and a half, but I always want to talk more about it. Otherwise, how can I make it clear that BSP is so advanced in more than an hour?This is the first time I have worked on a workshop in the group, so I have paid more attention to preparing for it for a few
1 PowerPC BSP Customization
1. The main function of BSP is to configure the system hardware to make it work normally and complete data interaction between the hardware and the software, provides a hardware-independent software platform for OS and upper-layer applications. Therefore, from the execution point of view, it can be divided into two parts: ø hardware initialization and operating system boot routine during the startup of the target system, wh
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